Image sensors include CCDs (Charge Coupled Devices) and APSes (Active Pixel Sensors); CMOS image sensors are a representative example of APSes. CCDs are used in video cameras and other devices, and CMOS image sensors are used in inexpensive digital still cameras and other devices. Of the two, CMOS image sensors can be manufactured using CMOS processes and so have low manufacturing costs, and have lower power consumption compared with CCD image sensors, and so are used in portable telephones, portable information terminals, and other battery-driven devices.
CMOS image sensors have a photodiode as a photoelectric conversion element, read out the amount of electric charge accumulated on the photodiode by using a source-follower transistor or similar and capture, the incident light intensity is captured as an electrical signal. CMOS image sensors which have already been commercialized are three-transistor type devices comprising a photodiode, a reset transistor, a source-follower transistor, and a selector transistor. In addition, recently a four-transistor type APS has been proposed, in which a transfer gate transistor is provided between the photodiode and the reset transistor.
Three-transistor type and four-transistor type APSes are for example described in Patent Document 1 (Japanese Patent Laid-open No. 2002-16243 (published Jan. 18, 2002)).
In a four-transistor type APS, a floating diffusion (FD) region, comprising a floating diffusion layer, is provided at the point of contact between the transfer gate transistor and the reset transistor. And, after placing this floating diffusion region at the reset level of the reset transistor, the transfer gate transistor is made conducting, so that charge accumulated in the photodiode region is transferred to the floating diffusion region to cause the potential thereof to change, and this change in potential is captured in a signal line via the source-follower transistor. By detecting the difference between the potential in the floating diffusion region at the time of reset and at the time charge is transferred from the photodiode, a signal with noise eliminated can be captured.
Further, a five-transistor type APS has been proposed, with an overflow drain transistor added in order to prevent photodiode overflow. By controlling the overflow drain transistor, the accumulation start time of the photodiode can be controlled, and a global shutter design can be adopted.
As the number of transistors within pixels increases in this way to accompany enhanced performance, the area ratio of the photodiode region to the pixel area decreases, leading to a decrease in the so-called aperture ratio. In order to alleviate this problem, common use of transistors and other elements by adjacent pixels has been proposed. However, in the case of a four-transistor type APS, three transistors are used in common between adjacent pixels, and so the layout of each pixel is not completely the same, and the unevenness in optical sensitivity among pixels is increased, leading to a decline in image quality.
Further, in order to prevent a decline in aperture ratio, a configuration has been proposed in which the photodiode region is embedded below the transistor formation region within pixels. For example, such a method is disclosed in Patent Document 1.
FIG. 1 is a cross-sectional view of a CMOS image sensor described in Patent Document 1. At a P-type epitaxial layer 52 formed on the P-type semiconductor substrate 51 are formed the gate electrode 55 of a transfer gate transistor TG, the gate electrode 58 of a reset transistor, and the gate electrode 61 of a source-follower transistor, with gate oxide films 56, 63, 61 intervening; on either side of these gate electrodes are provided source and drain regions 57, 59, 60, 62. A high-density N-type photodiode region 53 is formed in the depth direction from the surface of the epitaxial layer 52, and this photodiode region 53 is embedded so as to be extended below the transfer gate transistor, reset transistor, and source-follower transistor. The photodiode region 53 is embedded and isolated from the insulating film 54 at the surface by a high-density P+ region formed at the surface of the epitaxial layer 52, so that the dark current due to a leakage current from this insulating film 54 can be suppressed.
In this way, in the CMOS image sensor described in Patent Document 1, by embedding the photodiode region in superposition below the transistor formation region within a cell, reduction of the aperture ratio can be prevented, and photosensitivity is enhanced.